Field of the Invention
This invention relates to a multi-layer wiring board having an electronic component installed thereon.
Description of the Prior Art
Along with miniaturization of electronic devices in recent years, an increase in the density or miniaturization of electronic components in semiconductor chips, and so on, and narrowing of pitch of electronic component terminals, have been proceeding. Accompanying this, reduction or miniaturization of mounting area of wiring bases on which electronic components are mounted, has also been progressing. Under such current circumstances, multi-layering of wiring bases is also being pushed forward, and securing reliability of connection in inter-layer connection has become an essential requirement.
A multi-layer wiring board of a structure where wiring bases are multi-layered is sometimes employed, for example, as a board comprising an interposer for mounting an electronic component having a fine wiring pitch on a mounting board whose wiring pitch is comparatively coarse, such as a mother board (refer to International Patent Publication No. WO2007/129545 and Japanese Patent Publication No. 2008-60609).
However, in the multi-layer wiring board of conventional technology disclosed in the above-mentioned International Patent Publication No. WO2007/129545, a heat-resistant base which is the interposer is configured from a silicon (Si) base. Hence the more the number of electronic component terminals increases, the more difficult thinning is, and as a result, there is a problem that thickness of the board as a whole ends up increasing. In addition, the above-described conventional technology is basically build-up type, and also has a high manufacturing cost.
Moreover, in the multi-layer wiring board of conventional technology disclosed in the above-mentioned Japanese Patent Publication No. 2008-60609, the interposer configured from a printed base is disposed in an outermost layer, hence has room for improvement regarding cost and physical stability.